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A1357-ds features and benefits ? two-wire output enables reduced wiring costs in long wire systems ? simultaneous programming of pwm carrier frequency, quiescent duty cycle (qdc), and sensitivity for system optimization ? fully differential signal path increases emc immunity and reduces output offset drifts ? factory programmed sensitivity temperature coefficient and quiescent duty cycle drift ? programmability at end-of-line ? pulse width modulated (pwm) current output provides increased noise and emc immunity compared to an analog output ? precise recoverability after temperature cycling ? duty cycle clamps provide short circuit diagnostic capabilities ? optional 50% duty cycle calibration test mode at device power up ? wide ambient temperature range: ?40c to 150c ? resistant to mechanical stress two-wire high precision linear hall-effect sensor ic with pulse width modulated output current package: 3-pin sip (suffix kb) functional block diagram not to scale A1357 description the A1357 device is a high precision, programmable two-wire hall-effect linear sensor ic with a pulse width modulated (pwm) current. the A1357 device converts an analog signal from its internal hall sensor element to a digitally encoded pwm signal. the coupled noise immunity of the digitally encoded pwm is far superior to the noise immunity of an analog output signal. the bicmos, monolithic circuit inside of the A1357 integrates a hall element, precision temperature-compensating circuitry to reduce the intrinsic sensitivity and offset drift of the hall element, a small-signal high-gain amplifier, proprietary dynamic offset cancellation circuits, and pwm conversion circuitry. the dynamic offset cancellation circuits reduce the residual offset voltage of the hall element that is normally caused by device overmolding, temperature dependencies, and thermal stress. the high frequency offset cancellation (chopping) clock allows for a greater sampling rate, which increases the accuracy of the output current signal and results in faster signal processing capability. the A1357 sensor is provided in a lead (pb) free 3-pin single inline package (kb suffix), with 100% matte tin leadframe plating. vcc (and programming) c bybass v supply gnd 1 2 2 1 temperature compensation chopper switches voltage controlled current source pwm frequency trim signal recovery pwm carrier generation regulator signal conditioning % duty cycle temperature coefficient % duty cycle sensitivity trim amp
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pin-out diagram absolute maximum ratings characteristic symbol notes rating unit forward supply voltage v cc 28 v reverse supply voltage v rcc ?18 v forward supply current i cc 50 ma reverse supply current i rcc ?50 ma operating ambient temperature t a l temperature range ?40 to 150 oc maximum junction temperature t j (max) 165 oc storage temperature t stg v cc = 0 v ?65 to 170 oc selection guide part number packing* A1357lkb-t 500 pieces per bag A1357lkbtn-t 4000 pieces per 13-in. reel *contact allegro ? for additional packing options 23 1 terminal list table number name function 1 vcc input power supply; use bypass capacitor to connect to ground; also used for programming 2 gnd ground 3 nc no connect
operating characteristics valid over full operating temperature range, t a , v cc = 4.5 to 18 v, c bypass = 0.1 f, unless otherwise noted characteristics symbol test conditions min. typ. max. unit 1 electrical characteristics supply voltage 2 v cc 4.5 ? 18 v supply current i cc_low ?68ma i cc_high 12 ? 16.5 ma supply current ratio 2?? ? supply zener clamp voltage v zsupply i cc = 18 ma, t a = 25oc 28 ? ? v power-on time 3,4 t po f pwm = 1 khz ? ? 5 ms internal bandwidth bw i small signal ?3 db, 100 g (p-p) magnetic input signal, t a = 25 c ? 400 ? hz chopping frequency 5 f c t a = 25c ? 200 ? khz output current characteristics pwm out rise time 3,4 t r vcc pin, no c bypass or r sense , t a = 25 c ? 6.5 ? ma/ s pwm out fall time 3,4 t f vcc pin, no c bypass or r sense , t a = 25 c ? 6.5 ? ma/ s maximum propagation delay 3,4 t prop t a = 25 c ? 2 3 ms response time 3,4 t response impulse magnetic field of 300 g, f pwm = 1 khz, slew rate < 120 g/ms, t a = 25 c ? 2 3.125 ms duty cycle jitter 3,4,6 jitter pwm measured over 1000 output pwm clock periods, 3 sigma values, sens = 60 m% / g, t a = 25 c ? ? 0.090 % d clamp duty cycle d clp(high) 90 ? 95 % d d clp(low) 5 ? 10 % d pre-programming target 7 pre-programming quiescent current duty cycle d (q)pre b = 0 g, t a = 25c ? 50 ? % d pre-programming sensitivity sens pre t a = 25c ? 25 ? (m% d)/g pre-programming pwm out carrier frequency f pwmpre t a = 25c ? 1.5 ? khz quiescent current duty cycle programming initial quiescent current duty cycle d (q)init b = 0 g, t a = 25c ? d (q)pre ?% d guaranteed quiescent current duty cycle output range 8 d (q) b = 0 g, t a = 25c 40 ? 60 % d quiescent current duty cycle programming bits ? 9 ? bit average quiescent current duty cycle step size 9,10 step d(q) t a = 25c 0.091 0.103 0.115 % d quiescent current duty cycle programming resolution 11 err pgd(q) t a = 25c ? step d(q) 0. 5 ?% d two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com continued on the next page?
operating characteristics (continued) valid over full operating temperature range, t a , v cc = 4.5 to 18 v, c bypass = 0.1 f, unless otherwise noted characteristics symbol test conditions min. typ. max. unit continued on the next page? sensitivity programming initial sensitivity sens init t a = 25c ? sens pre ? (% d)/g sensitivity programming bits range_ selection t a = 25c ? 1 ? bit fine t a = 25c ? 8 ? bit guaranteed sensitivity range sens range1 t a = 25c 35 ? 70 (m% d)/g sens range2 t a = 25c 70 ? 145 (m% d)/g average sensitivity step size 9,10 step sens1 t a = 25c 215 300 375 ( % d)/g step sens2 t a = 25c 430 600 750 ( % d)/g sensitivity programming resolution 11 err pgsens t a = 25c ? step sens 0. 5 ?( % d)/g carrier frequency programming initial carrier frequency f pwminit t a = 25c ? f pwmpre ?hz carrier frequency programming range f pwm t a = 25c 0.9 1 1.1 khz carrier frequency programming bits ? 4 ? bit average carrier frequency step size 9,10 step fpwm t a = 25c 38 54 70 hz carrier frequency programming resolution 11 err pgfpwm t a = 25c ? step fpwm 0. 5 ?hz calibration test mode calibration test mode selection bit ? 1 ? bit calibration test mode duration 4 t cal f pwm = 1 khz 45 50 55 ms output duty cycle during calibration mode 4 d cal 49 50 51 % d lock bit programming overall programming lock bit lock ? 1 ? bit factory programmed sensitivity temperature coefficient and drift characteristics sensitivity temperature coefficient 12 sens tc_ ndfeb t a = 150c ? 0.11 ? %/c sensitivity drift through temperature range 13 sens tc t a = 150c ? < 3 ? % sensitivity drift due to package hysteresis 3 sens pkg t a = 150c, after temperature cycling ? < 1 ? % two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com
operating characteristics (continued) valid over full operating temperature range, t a , v cc = 4.5 to 18 v, c bypass = 0.1 f, unless otherwise noted characteristics symbol test conditions min. typ. max. unit factory programmed quiescent current duty cycle drift quiescent current duty cycle temperature coefficient 12 d tc(q) t a = 150c ? 0 ? (% d)/c quiescent current duty cycle drift through temperature range 14 d (q) sens = sens pre , t a = 150c ? < 0.35 ? % d error components linearity sensitivity error lin err ? < 1.5 ? % symmetry sensitivity error sym err ? < 1.5 ? % 1 1 g (gauss) = 0.1 mt (millitesla). 2 supply voltage is the voltage drop between device supply and ground pins. it does not include a drop through a sense resistor. 3 see characteristic definitions section. 4 guarenteed by design only. characterized but not tested in production. 5 f c varies up to approximately 20% through the full operating ambient temperature range, t a , and process. 6 jitter is dependent on the sensitivity of the device. 7 raw device characteristic values before any programming. 8 d (q) (max) is the value available with all programming fuses blown (maximum programming code set). the d (q) range is the total range from d (q) (min) up to and including d (q) (max). see characteristic definitions section. 9 step size is larger than required, in order to provide for manufacturing spread. see characteristic definitions section. 10 non-ideal behavior in the programming dac can cause the step size at each significant bit rollover code to be greater than twic e the maximum specified value of step d(q) , step sens , or step fpwm . 11 overall programming value accuracy. see characteristic definitions section. 12 programmed at 150c and calculated relative to 25c. 13 sensitivity drift from expected value at t a after programming sens tc . see characteristic definitions section. 14 d (q) drift from expected value at t a after programming d tc(q) . two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com
thermal characteristics may require derating at maximum conditions, see application information characteristic symbol test conditions* value units package thermal resistance r ja 1-layer pcb with copper limited to solder pads 177 oc/w *additional thermal data available on the allegro web site. ambient temperature, t a (oc) ambient temperature, t a (oc) maximum allowable v cc (v) power dissipation, p d (mw) v cc (max) v cc (min) 20 15 10 5 0 900 800 700 600 500 400 300 200 100 0 20 40 80 60 100 120 140 160 20 40 80 60 100 120 140 160 power dissipation versus ambient temperature power derating curve two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com characteristic definitions power-on time when the supply is ramped to its operating voltage, the device requires a finite time to power its internal components before supplying a valid pwm output duty-cycle. power-on time, t po , is defined as the time it takes for the output voltage to settle within 10% of its steady state value after the power supply has reached its minimum specified operating volt- age, v cc (min). (see figure 1.) propagation delay traveling time of signal from input hall plate to output stage of device. (see figure 2.) response time the time interval, t response , between a) when the applied magnetic field reaches 90% of its final value, and b) when the sensor ic reaches 90% of its output correspond- ing to the applied magnetic field. (see figure 2.) pwm out rise time the time, t r , elapsed between 10% and 90% of the rising signal value when output current switches from low to high states. pwm out fall time the time, t f , elapsed between 90% and 10% of the falling signal value when output current switches from high to low states. quiescent current duty cycle in the quiescent state (no significant magnetic field: b = 0 g), the quiescent current duty cycle, d (q) , equals a specific programmed duty cycle throughout the entire operating ranges of v cc and ambient temperature, t a . guaranteed quiescent current duty cycle range the quiescent current duty cycle, d (q) , can be programmed around its nominal value of 50% d, within the guaranteed quiescent duty cycle range limits: d (q) (min) and d (q) (max). the available guaranteed programming range for d (q) falls within the distribu- tions of the minimum and the maximum programming code for setting d (q) . (see figure 3.) average quiescent current duty cycle step size the average quiescent current duty cycle step size, step d(q) , for a single device is determined using the following calculation: d (q) (max) ? d (q) (min) 2 n ?1 step d(q) = , (1) where: n is the number of available programming bits in the trim range, 2 n ? 1 is the value of programming steps in the range, d (q) (max) is the maximum reached quiescent duty cycle, and d (q) (min) is minimum reached quiescent duty cycle. figure 1. definition of power-on time figure 2. definitions of propagation delay and response time figure 3. definition of guaranteed quiescent voltage output range guaranteed d (q) programming range d (q) (min) d (q) (max) max code d (q) distribution min code d (q) distribution initial d (q) distribution time time v cc (min) t po first valid duty cycle v cc i cc time b-field icc propagation delay 1ms a b adc bdc adc ? dc corresponds to the a field bdc ? dc corresponds to the b field c response time 0.9 c cdc cdc ? dc corresponds to the 0.9 c field
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com quiescent current duty cycle output programming resolution the programming resolution for any device is half of its programming step size. therefore, the typical programming resolution will be: err pgd(q) (typ) = 0.5 step d(q) (typ) . (2) quiescent duty cycle output drift through tempera- ture range due to internal component tolerances and thermal considerations, the quiescent duty cycle temperature coef- ficient, d tc(q) , may drift from its nominal value over the operat- ing ambient temperature, t a . for purposes of specification, the quiescent duty cycle output drift through temperature range, ? d (q) (% d), is defined as: d (q)(ta) ? d (q)(25c) ? d (q) = , (3) where d (q)(ta) is the quiescent duty cycle measured at t a and d (q)(25c) is the quiescent duty cycle measured at 25c. sensitivity the presence of a south polarity magnetic field, perpendicular to the branded surface of the package face, increases the current duty cycle from its quiescent value toward the maximum duty cycle limit. the amount of the current duty cycle increase is proportional to the magnitude of the magnetic field applied. conversely, the application of a north polarity field decreases the current duty cycle from its quiescent value. this proportionality is specified as the magnetic sensitiv- ity, sens ((% d)/g), of the device, and it is defined for bipolar devices as: d (bpos) ? d (bneg) bpos ? bneg sens = , (4) and for unipolar devices as: d (bpos) ? d (q) bpos sens = , (5) where bpos and bneg are two magnetic fields with opposite polarities. guaranteed sensitivity range the magnetic sensitivity can be programmed from its initial value, sens init , to a value within the guaranteed sensitivity range limits: sens range (min) and sens range (max). average sensitivity step size refer to the average qui- escent current duty cycle step size section for a conceptual explanation. sensitivity programming resolution refer to the quies- cent current duty cycle programming resolution section for a conceptual explanation. carrier frequency target the pwm out signal carrier frequency programming range, f pwm , can be programmed to its typical value of 1 khz. average carrier frequency step size refer to the average quiescent current duty cycle step size section for a conceptual explanation. carrier frequency programming resolution refer to the quiescent durrent duty cycle programming resolution section for a conceptual explanation. sensitivity temperature coefficient device sensitiv- ity changes as temperature changes, with respect to its pro- grammed sensitivity temperature coefficient, sens tc . sens tc is programmed at 150c, and calculated relative to the nominal sensitivity programming temperature of 25c. sens tc (%/c) is defined as: sens t2 ? sens t1 sens t1 t2?t1 1 sens tc = 100% , ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (6) where t1 is the nominal sens programming temperature of 25c, and t2 is the programming temperature of 150c. the expected value of sens through the full ambient temperature range, sens expected(ta) , is defined as: sens t1 [100% +sens tc ( t a ? t1 )] sens expected(ta) = . 100 % (7) sens expected (ta) should be calculated using the actual measured values of sens t1 and sens tc rather than programming target values. sensitivity drift through temperature range second order sensitivity temperature coefficient effects cause the mag- netic sensitivity, sens, to drift from its expected value through the operating ambient temperature range, t a . for purposes of specification, the sensitivity drift through temperature range, ? sens tc , is defined as: sens ta ? sens expected(ta) sens expected(ta) ? sens tc = 100% . (8) sensitivity drift due to package hysteresis package stress and relaxation can cause the device sensitivity at t a = 25c to change during and after temperature cycling.
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com for purposes of specification, the sensitivity drift due to pack- age hysteresis, ? sens pkg , is defined as: sens (25c)2 ? sens (25c)1 sens (25c)1 ? sens pkg = 100% , (9) where sens (25c)1 is the programmed value of sensitivity at t a = 25c, and sens (25c)2 is the value of sensitivity at t a = 25c, after temperature cycling t a up to 150c, down to ?40c, and back to up 25c. linearity sensitivity error the A1357 is designed to provide a linear current output in response to a ramping applied magnetic field. consider two magnetic fields, b1 and b2. ideally, the sen- sitivity of a device is the same for both fields, for a given supply voltage and temperature. linearity error is present when there is a difference between the sensitivities measured at b1 and b2. linearity sensitivity error is calculated separately for the positive (lin errpos ) and negative (lin errneg ) applied magnetic fields. linearity error (%) is measured and defined as: sens bpos2 sens bpos1 sens bneg2 sens bneg1 1? lin errpos = 100% , ? ? ? ? ? ? ? ? 1? lin errneg = 100% , ? ? ? ? ? ? ? ? (10) where: |d (b x ) ? d (q) | b x sens b x = . (11) and b posx and b negx are positive and negative magnetic fields, with respect to the quiescent current duty cycle such that b pos2 = 2 b pos1 and b neg2 = 2 b neg1 . then: lin err max( lin errpos , lin errneg ) = . (12) note that unipolar devices only have positive linearity error (lin errpos ). symmetry sensitivity error the magnetic sensitivity of the A1357 device is constant for any two applied magnetic fields of equal magnitude and opposite polarities. symmetry sensitivity error, sym err (%), is measured and defined as: sens bpos sens bneg 1? sym err = 100% , ? ? ? ? ? ? ? ? (13) where sens bx is as defined in equation 11, and bpos and bneg are positive and negative magnetic fields such that |bpos| = |bneg|. note that the symmetry sensitivity error specification is valid only for bipolar devices. duty cycle jitter the duty cycle of the pwm out output may vary slightly over time despite the presence of a constant applied magnetic field and a constant carrier frequency, f pwm , for the pwm out signal. this phenomenon is known as jitter, and is defined as: jitter pwm = , 3 s d b i 1 n n i =1 (14) where d b1 ,?, d bn are the sampled duty cycles in a constant applied magnetic field, b, measured over 1000 pwm clock peri- ods, and jitter pwm is given in % d.
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com typical application circuit gnd A1357 vcc 1 2 v supply r sense c bypass 0.1 f gnd A1357 vcc 1 2 v supply r sense c bypass 0.1 f the current switching performed by the hall sensor ic can be observed as voltage switching. to do so, place a sense resistor, r sense , between the supply and the A1357 vcc pin (see figure 4), or between the A1357 gnd pin and ground (figure 5). there is an advantage to putting the sense resistor between the supply and the A1357 vcc pin, because the resistor can then provide additional device protection from supply transients. when specifying value of the r sense and the applied supply volt- age in the application, the following equation must be applied, in order to provide enough voltage to allow the A1357 to power-up: v supply > r sense i cc_high (max) + v cc (min) , (15) where i cc (max) is the maximum A1357 supply current and v cc (min) is the A1357 minimum supply voltage. substituting into equation 15: 12 v > r sense 16.5 ma + 4.5 v , therefore: r sense (12 ? 4.5) v / 16.5 ma 454 . it can be seen that r sense is proportional to v supply . the higher the value of r sense , the higher the application supply voltage required. the recommended minimum c bypass value is 0.01 f. figure 4. high-side pwm voltage sensing configuration figure 5. low-side pwm voltage sensing configuration
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com overview programming is accomplished by sending a series of input volt- age pulses serially through the vcc pin of the device. a unique combination of different voltage level pulses controls the internal programming logic of the device to select a programmable parameter and change its value. there are three voltage levels that must be taken into account when programming. these levels are referred to as high , v p(high) , mid , v p(m id) , and low , v p(low) . the A1357 features try mode, blow mode and lock mode: ? in try mode, the value of multiple programmable parameters may be set and measured simultaneously. the parameter values are stored temporarily, and reset after cycling the supply volt- age. ? in blow mode, the value of a single programmable parameter may be set and measured, and then permanently set by blowing solid-state fuses internal to the device. additional parameters may be blown sequentially. this mode also is used for blow- ing the device-level fuse (when lock mode is enabled), which permanently blocks the further programming of all parameters. ? lock mode prevents all future programming of the device. this is accomplished by blowing a special fuse using blow mode. the programming sequence is designed to help prevent the device from being programmed accidentally; for example, as a result of noise on the supply line. although any programmable variable power supply can be used to generate the pulse wave- forms, allegro highly recommends using the allegro sensor evaluation kit, available on the allegro website on-line store. the manual for that kit is available for download free of charge, and provides additional information on programming this device. definition of terms register the section of the programming logic that controls the choice of programmable modes and parameters. bit field the internal fuses unique to each register, represented as a binary number. changing the bit field settings of a particular register causes its programmable parameter to change, based on the internal programming logic. key a series of mid-level voltage pulses used to select a register, with a value expressed as the decimal equivalent of the binary value. the lsb of a register is denoted as key 1, or bit 0. code the number used to identify the combination of fuses activated in a bit field, expressed as the decimal equivalent of the binary value. the lsb of a bit field is denoted as code 1, or bit 0. addressing increasing the bit field code of a selected register by serially applying a pulse train through the vcc pin of the device. each parameter can be measured during the addressing process, but the internal fuses must be blown before the program- ming code (and parameter value) becomes permanent. fuse blowing applying a high voltage pulse of sufficient duration to permanently set an addressed bit by blowing a fuse internal to the device. after a bit (fuse) has been blown, it cannot be reset. blow pulse a high voltage pulse of sufficient duration to blow the addressed fuse. cycling the supply powering-down, and then powering-up the supply voltage. cycling the supply is used to clear the program- ming settings in try mode. programming guidelines programming pulse requirements, protocol at t a = 25 c characteristic symbol notes min. typ. max. unit programming voltage v p(low) measured at the vcc pin. 4.5 5 5.5 v v p(mid) 13 15 16 v v p(high) 26 27 28 v programming current i p minimum supply current required to ensure proper fuse blowing. in addition, a minimum capacitance, c blow = 0.1 f, must be connected between the supply and gnd pins during programming to provide the current necessary for fuse blowing. the blowing capacitor should be removed and the load capacitance used for properly programming duty cycle measurements. 300 ? ? ma pulse width t low duration of v p(low) for separating v p(mid) and v p(high) pulses. 40 ? ? s t active duration of v p(mid) and v p(high) pulses for register selection or bit field addressing. 40 ? ? s t blow duration of v p(high) pulses for fuse blowing. 40 ? ? s pulse rise time t pr rise time required for transitions from v p(low) to either v p(mid) or v p(high) . 5 ? 100 s pulse fall time t pf fall time required for transitions from v p(high) to either v p(mid) or v p(low) . 5 ? 100 s
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 12 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com mode and parameter selection each programmable mode and parameter can be accessed through specific registers. to select a register, a sequence of voltage pulses consisting of a v p(high) pulse, a series of v p(mid) pulses, and a v p(high) pulse (with no vcc supply interruptions) must be applied serially to the supply pin. the quantity of v p(mid) pulses is called the key, and uniquely identifies each register. the pulse train used for selection of the first register, key 1, is shown in figure 6. the A1357 has two registers that select among the three program- mable modes: ? register mode 1: blow and lock modes ? register mode 2: try mode and there are four registers that select among the four program- mable parameters: ? register 1: sensitivity, sens ? register 2: quiescent current duty cycle, d (q) ? register 3: pulse width modulated carrier frequency , f pwm ? register 6: lock (device locking) bit field addressing after a programmable parameter has been selected, a v p(high) pulse transitions the programming logic into the bit field address- ing state. applying a series of v p(mid) pulses to the vcc pin of the device, as shown in figure 7, increases by one the bit field of the selected parameter. when addressing the bit field, the quantity of v p(mid) pulses is represented by a decimal number called a code . addressing activates the corresponding fuse locations in the given bit field by increasing the binary value of an internal dac. the value of the bit field (and code) increases by one with the falling edge of each v p(mid) pulse, up to the maximum possible code (see the programming logic table). as the value of the bit field code increases, the value of the programmable parameter changes. measurements can be taken after each pulse to determine if the required result for the programmable parameter has been reached. cycling the supply voltage resets all the locations in the bit field that have unblown fuses to their initial states. fuse blowing after the required code is found for a given parameter, its value can be set permanently by blowing individual fuses in the appro- priate register bit field. blowing is accomplished by applying a v p(high) pulse, called a blow pulse, of sufficient duration at the v p(high) level to permanently set an addressed bit by blowing a fuse internal to the device. due to power requirements, the fuse for each bit in the bit field must be blown individually. to accom- plish this, the code representing the required parameter value must be translated to a binary number. for example, as shown in figure 8, decimal code 5 is equivalent to the binary number 101. therefore bit 2 (code 4) must be addressed and blown, the device power supply cycled, and then bit 0 (code 1) addressed programming procedures figure 6. parameter selection pulse train. this shows the sequence for selecting the register corresponding to key 1, indicated by a single v p(mid) pulse. v+ 0 t low t active v p(high) v p(mid) v p(low) figure 7. bit field addressing pulse train. addressing the bit field by increasing the code causes the programmable parameter value to change. the number of bits available for a given programming code, n , varies among parameters; for example, the bit field for d (q) has 8 bits available, which allows 255 separate codes to be used. v+ 0 v p(high) v p(mid) v p(low) code 1 code 2 code 2 n ? 2 code 2 n ? 1
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 13 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com and blown. an appropriate sequence for blowing code 5 is shown in figure 9. the order of blowing bits, however, is not important. blowing bit 0 first, and then bit 2 is acceptable. note: after blowing, the programming is not reversible, even after cycling the supply power. although a register bit field fuse cannot be reset after it is blown, additional bits within the same register can be blown at any time until the device is locked. for example, if bit 1 (binary 10) has been blown, it is still possible to blow bit 0. the end result would be binary 11 (decimal code 3). locking the device after the required code for each parameter is programmed, the device can be locked to prevent further programming of any parameters. additional guidelines the additional guidelines presented in this section should be fol- lowed to ensure the proper behavior of these devices: ? a 0.1 f blowing capacitor, c blow , must be mounted between the vcc pin and the gnd pin during programming, to ensure enough current is available to blow fuses. ? the application load capacitance, c l , should be used when measuring the duty cycle during programming. the blowing capacitor, c blow , should be removed during measurement and should only be applied when blowing fuses. ? the blowing capacitor, c blow , must be replaced in the final application with the load capacitance, c l , for proper operation. ? the power supply used for programming must be capable of delivering at least 26 v and 300 ma. ? be careful to observe the t low delay time before powering down the device after blowing each bit. ? the following programming order is recommended: 1. f pwm 2. sens 3. d (q) 4. lock the device (only after all other parameters have been programmed and validated, because this prevents any further programming of the device) programming modes try mode try mode allows multiple programmable parameters to be tested simultaneously without permanently setting any values. in this mode, each v p(high) pulse will indefinitely loop the programming logic through the mode, register, and bit field selection states. there must be no interruptions in the v cc supply. after powering the v cc supply, select mode key 2, followed by the parameter register, and then address its bit field. when addressing the bit field, each v p(mid) pulse increases the value of the parameter register by one, up to the maximum possible code (see programming logic section). the addressed parameter value is stored in the device even after the programming drive voltage is removed from the vcc pin, allowing its value to be measured. to test an additional programmable parameter in figure 9. example of blow mode programming pulses applied to the vcc pin. in this example, d (q) (parameter key 2) is addressed to code 4 (i.e bit 2) and its value is permanently blown. v+ 0 mode selection parameter selection (key 1) v p(high) v p(mid) v p(low) (key 2) (code 4) addressing bitfield 2 t blow code 4 blow t low cycle vcc supply cycle vcc supply 1121234 figure 8. example of code 5 broken into its binary components, which are code 4 and code 1. (decimal equivalent) code 5 bit field selection address code format code in binary fuse blowing target bits fuse blowing address code format (binary) 1 0 1 bit 2 bit 0 code 4 code 1 (decimal equivalents)
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 14 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com conjunction with the original, enter an additional v p(high) pulse on the vcc pin to reenter the parameter selection field. select a different parameter register, and address its bit field, without any supply interruptions. both parameter values will be stored and can be measured after removing the programming drive voltage. multiple programming combinations can be tested to achieve optimal application accuracy. see figure 10 for an example of the try mode pulse train. registers can be addressed and re-addressed an indefinite number of times in any order. after the required code is found for each register, cycle the supply and blow the bit field using blow mode. blow mode after the required value of the programmable parameter is found using try mode, the corresponding code should be blown to make the value permanent. to do this, first select blow mode as key 1, then the required parameter register, and address and blow each required bit separately (as described in the fuse blowing section). the supply must be cycled between blowing each bit of a given code. after a bit is blown, cycling the supply will not reset its value. single parameters can be still addressed in the blow mode before fuse blowing. simultaneous addressing of multiple parameters, as in try mode, is not possible. after powering the v cc supply, select the desired parameter register and address its bit field. when addressing the bit field, each v p(mid) pulse increases the value of the parameter register by one, up to the maximum possible code (see programming logic table). the addressed parameter value is stored in the device even after the program- ming drive voltage is removed from the vcc pin, allowing its value to be measured. it is not possible to decrease the value of the register without resetting the parameter bit field. to reset the bit field, and thus the value of the programmable parameter, cycle the supply, v cc , voltage. it is possible to switch between try and blow modes in that, after individual programmable parameters have been blown in blow mode, other parameters can be still tested in try mode. lock mode to lock the device, first select lock mode, then address the lock bit and apply a blow pulse with c blow in place. after locking the device, no future programming of any param- eter is possible. v+ 0 mode selection parameter selection (key 2, try mode) v p(high) v p(mid) v p(low) (key 1) (code 3) addressing parameter selection (key 2) (code 2) addressing 12 1 12 12 12 3 figure 10. example of try mode programming pulses applied to the vcc pin. in this example, sensitivity (parameter key 1) is addressed to code 3, and d (q) (parameter key 2) is addressed to code 2. the values set in the sensitivity and d (q) registers will be held in the device until the supply is cycled. permanent fuse blowing cannot be accomplished in try mode.
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 15 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com programming state machine v p(high) v p(high) v p(high) v p(high) v p(high) v p(high) 2 x v p(high) v p(mid) v p(mid) v p(mid) v p(mid) v p(mid) v p(mid) v p(mid) 1 (sens range1/ range2) 2 (d (q) ) select mode 3 (f pwm / calibration test mode) 6 (lock all) v p(mid) v p(mid) v p(mid) v p(mid) v p(mid) v p(mid)
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 16 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com programming logic table mode or parameter name (register key) bit field address description binary format [msb lsb] decimal equivalent code programmable mode lock, blow (1) 01 1 entry to lock or blow mode try (2) 10 2 entry to try mode programmable parameter sens (range1/range2) (1) 0 0000 0000 0 minimum sens value in sens range1 , sens = sens pre 0 1111 1111 255 maximum sens value in sens range1 1 0000 0000 256 minimum sens value in sens range2 1 1111 1111 511 maximum sens value in sens range2 d (q) (2) 0 0000 0000 0 initial value, d (q) = d (q)pre 0 1111 1111 255 maximum quiescent current duty cycle in range 1 0000 0000 256 switch from programming increasing d (q) to programming decreasing d (q) 1 1111 1111 51 1 minimum quiescent current duty cycle in range f pwm / calibration test mode (3) 0 0000 0000 0 initial value; f pwm = f pwmpre 0 0000 1111 15 minimum pwm frequency in range 0 0001 0000 16 enable 50% duty cycle calibration test mode lock all (6) 10 0000 0000 512 enable blowing lock fuse to lock device sens (%/gauss) d (q) (%) quiescent current duty cycle range d (q) (max) d (q) (min) d (q)pre f pwm (hz) f pwmpre f pwm (max) f pwm (min)
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 17 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com the calibration mode is provided so that the user can compensate for differences in the ground potential between the A1357 and any interface circuitry used to measure the pulse width of the A1357 current. the test mode is optional and must be enabled by blowing programming bits. after the bit for the test mode has been blown, the device enters 50% duty cycle calibration test mode every time the device is powered-up. the bit enabling test mode is key 3, bit 4. in customer applications, the pwm interface circuitry (shown as the system controller in figure 11) and the A1357 may be powered via different power and ground circuits. as a result, the ground reference for the A1357 may differ from the ground refer- ence of the system controller. in some customer applications, this ground difference can be as large as 0.5 v. differences in the ground reference for the A1357 and the system controller can result in variations in the threshold voltage used to measure the duty cycle of the A1357. if the pwm conversion threshold voltage varies, then the duty cycle will vary because there is a finite rise time, t r , and fall time, t f , in the pwm wave- form. this problem is shown in figure 12. 50% duty cycle calibration test mode pwm period duty cycle shorter than expected duty cycle at expected duration duty cycle longer than expected v th (high) ? t r ? t f v th (centered) v th (low) 2.5 3.5 1.5 threshold voltage, v th (v) time figure 12. when the threshold voltage, v th , is correctly centered between v th (high) and v th (low) , the current duty cycle accurately coincides with the applied magnetic field. if the threshold voltage is raised, the current duty cycle appears shorte r than expected. conversely, if the threshold voltage is lowered, the current duty cycle is longer than expected. gnd1 gnd2 system controller gnd A1357 vcc 1 2 v supply r sense c bypass 0.1 f figure 11. in many applications the A1357 may be powered using a different ground reference than the system controller. this may cause the ground reference for the A1357 (gnd1) to differ from the ground reference of the system controller (gnd2) by as much as to 0.5 v.
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 18 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com the 50% duty cycle calibration test mode allows end users to compensate for any threshold errors that result from a difference in system ground potentials. when calibration mode has been enabled, at power-up the device operates initially in calibration mode for t cal , 50 ms, during which the device current waveform has a fixed 50% duty cycle (the programmed quiescent duty cycle, d (q) , value) regardless of the applied external magnetic field (see figure 13). this allows the system controller to com- pare the measured quiescent duty cycle with an ideal 50% duty cycle. after t cal has elapsed, the duty cycle will correspond to an applied magnetic field as expected. the calibration test time (t cal ) corresponds with a target pwm frequency of 1 khz. if the pwm frequency is programmed away from its target of 1 khz, the duration of the calibration test time will scale inversely with the change in pwm frequency. figure 13. with calibration mode in effect, after powering-on the A1357 outputs a 50% duty cycle for the first 50 ms, t cal , regardless of the applied magnetic field. after t cal has elapsed, the output responds to a magnetic field as expected. the example in this figure assumes that a large +b field is applied to the device after t cal has elapsed. calibration sequence pwm proportional to magnetic field
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 19 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package kb, 3-pin sip 1.90 nom 2.16 max 45 45 0.84 ref 23 1 a gate and tie bar burr area a b b c d e e dambar removal protrusion (6x) mold ejector pin indent branded face standard branding reference view n = device part number y = last two digits of year of manufacture w = week of manufacture yyww nnnn 1 5.21 +0.08 ?0.05 0.38 +0.06 ?0.03 3.43 +0.08 ?0.05 0.51 +0.07 ?0.05 14.73 0.51 1.55 0.05 for reference only; not for tooling use (reference dwg-9009) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown branding scale and appearance at supplier discretion d d d 1.33 2.60 c hall element (not to scale) active area depth 0.43 mm ref
two-wire high precision linear hall-effect sensor ic with pulse width modulated output current A1357 20 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com for the latest version of this document, visit our website: www.allegromicro.com copyright ?2011, allegro microsystems, inc. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.

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